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Challenges of developing qualification methods for DDR class devices – Part 2
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Challenges of developing qualification methods for DDR class devices – Part 2
Guertin, Steven M.
URI:
http://hdl.handle.net/2014/43906
Date:
2011-06-29
Keywords:
reliability testing; cell retention; Double Data Rate 2 (DDR2); DDR3
Publisher:
Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2011.
Citation:
NEPP Electronic Technology Workshop, Greenbelt, Maryland, June 28-30, 2011
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11-2509p_A1b.pdf
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JPL TRS 1992+
JPL TRS 1992+
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