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Low-power architectures for large radio astronomy correlators

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dc.contributor.author D'Addario, Larry R.
dc.date.accessioned 2013-10-17T20:57:52Z
dc.date.available 2013-10-17T20:57:52Z
dc.date.issued 2011-08-13
dc.identifier.citation 2011 XXXth URSI General Assembly and Scientific Symposium, Istanbul, Turkey, August 13-20, 2011 en_US
dc.identifier.clearanceno 11-2666
dc.identifier.uri http://hdl.handle.net/2014/43893
dc.description.abstract The architecture of a cross-correlator for a synthesis radio telescope with N > 1000 antennas is studied with the objective of minimizing power consumption. It is found that the optimum architecture minimizes memory operations, and this implies preference for a matrix structure over a pipeline structure and avoiding the use of memory banks as accumulation registers when sharing multiply-accumulators among baselines. A straw-man design for N = 2000 and bandwidth of 1 GHz, based on ASICs fabricated in a 90 nm CMOS process, is presented. The crosscorrelator proper (excluding per-antenna processing) is estimated to consume less than 35 kW. en_US
dc.description.sponsorship NASA/JPL en_US
dc.language.iso en_US en_US
dc.publisher Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2011. en_US
dc.subject signal processing en_US
dc.subject radio telescope en_US
dc.subject correlators en_US
dc.title Low-power architectures for large radio astronomy correlators en_US
dc.type Preprint en_US


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