dc.contributor.author |
Agarwal, Shri |
|
dc.date.accessioned |
2013-08-19T15:28:19Z |
|
dc.date.available |
2013-08-19T15:28:19Z |
|
dc.date.issued |
2012-02-06 |
|
dc.identifier.citation |
Component for Military and Space Electronics Conference and Exhibit, Los Angeles, California, February 6-9, 2012 |
en_US |
dc.identifier.clearanceno |
11-5490 |
|
dc.identifier.uri |
http://hdl.handle.net/2014/43510 |
|
dc.description.sponsorship |
NASA/JPL |
en_US |
dc.language.iso |
en_US |
en_US |
dc.publisher |
Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2011 |
en_US |
dc.subject |
Class Y |
en_US |
dc.subject |
Engineering Practice (EP) Study |
en_US |
dc.subject |
field-programmable gate array (FPGA) |
en_US |
dc.title |
Yearly progress update on the Class Y Initiative : infusion of new technology into the QML system |
en_US |
dc.type |
Presentation |
en_US |