dc.contributor.author |
Powell, Wesley A. |
|
dc.contributor.author |
Johnson, Michael A. |
|
dc.contributor.author |
Wilmot, Jonathan |
|
dc.contributor.author |
Some, Raphael |
|
dc.contributor.author |
Gostelow, Kim P. |
|
dc.contributor.author |
Reeves, Glenn |
|
dc.contributor.author |
Doyle, Richard J. |
|
dc.date.accessioned |
2012-04-27T20:21:46Z |
|
dc.date.available |
2012-04-27T20:21:46Z |
|
dc.date.issued |
2011-03-29 |
|
dc.identifier.citation |
InfoTech@Aerospace 2011, St Louis, Missouri, March 28-30, 2011. |
en_US |
dc.identifier.clearanceno |
11-1140 |
|
dc.identifier.uri |
http://hdl.handle.net/2014/42053 |
|
dc.description.abstract |
Recent commercial developments in multicore processors (e.g. Tilera, Clearspeed, HyperX) have provided an option for high performance embedded computing that rivals the performance attainable with FPGA-based reconfigurable computing architectures. Furthermore, these processors offer more straightforward and streamlined application development by allowing the use of conventional programming languages and software tools in lieu of hardware design languages such as VHDL and Verilog. With these advantages, multicore processors can significantly enhance the capabilities of future robotic space missions. This paper will discuss these benefits, along with onboard processing applications where multicore processing can offer advantages over existing or competing approaches. This paper will also discuss the key artchitecural features of current commercial multicore processors. In comparison to the current art, the features and advancements necessary for spaceflight multicore processors will be identified. These include power reduction, radiation hardening, inherent fault tolerance, and support for common spacecraft bus interfaces. Lastly, this paper will explore how multicore processors might evolve with advances in electronics technology and how avionics architectures might evolve once multicore processors are inserted into NASA robotic spacecraft. |
en_US |
dc.description.sponsorship |
NASA/JPL |
en_US |
dc.language.iso |
en_US |
en_US |
dc.publisher |
Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2011. |
en_US |
dc.subject |
space missions |
en_US |
dc.subject |
multi-core processor |
en_US |
dc.title |
Enabling future robotic missions with multicore processors |
en_US |
dc.type |
Preprint |
en_US |
dc.subject.NASATaxonomy |
Spacecraft Instrumentation and Astrionics |
en_US |