The design of a fault-tolerant, real-time, multi-core computer system

Abstract

The goal is a fault-tolerant, self-aware, lowpower, multi-core computer for space missions with thousands of simple cores, achieving speed through concurrency. A second goal is that the system is not difficult to program. The proposed machine decides how to achieve concurrency, in real-time, rather than programmers who now spend considerable effort carefully orchestrating every data item’s location and movement. Closely related, fault-tolerant and power-aware re-organizing behavior is automatic. The driving features of the system are: simple hardware that is modular in the extreme, with no shared memory, and software with significant run-time reorganizing capability.