JPL Technical Report Server

Reliability of CGA/LGA/HDI Package Board/Assembly

Show simple item record Ghaffarian, Reza 2012-03-01T23:20:54Z 2012-03-01T23:20:54Z 2012-02
dc.description.abstract This follow-up report presents reliability test results conducted by thermal cycling of five CGA assemblies evaluated under two extreme cycle profiles, representative of use for high-reliability applications. The thermal cycles ranged from a low temperature of −55°C to maximum temperatures of either 100°C or 125°C with slow ramp-up rate (3°C/min) and dwell times of about 15 minutes at the two extremes. Optical photomicrographs that illustrate key inspection findings of up to 200 thermal cycles are presented. Other information presented include an evaluation of the integrity of capacitors on CGA substrate after thermal cycling as well as process evaluation for direct assembly of an LGA onto PCB. The qualification guidelines, which are based on the test results for CGA/LGA/HDI packages and board assemblies, will facilitate NASA projects’ use of very dense and newly available FPGA area array packages with known reliably and mitigation risks, allowing greater processing power in a smaller board footprint and lower system weight. en_US
dc.description.sponsorship NASA/JPL en_US
dc.language.iso en_US en_US
dc.publisher Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2012. en_US
dc.relation.ispartofseries JPL Publication en_US
dc.relation.ispartofseries 12-3 Revision A en_US
dc.subject BME Capacitor en_US
dc.subject thermal cycle en_US
dc.subject solder joint reliability en_US
dc.subject column grid array (CGA) en_US
dc.subject ceramic column grid array (CCGA) en_US
dc.title Reliability of CGA/LGA/HDI Package Board/Assembly en_US
dc.type Technical Report en_US
dc.subject.NASATaxonomy Quality Assurance and Reliability en_US

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