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Transistor level circuit experiments using evolvable hardware.

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dc.contributor.author Stoica, A.
dc.contributor.author Zebulum, R. S.
dc.contributor.author Keymeulen, D.
dc.contributor.author Ferguson, M. I.
dc.contributor.author Daud, Taher
dc.contributor.author Thakoor, A.
dc.date.accessioned 2009-04-08T19:00:43Z
dc.date.available 2009-04-08T19:00:43Z
dc.date.issued 2005-06-15
dc.identifier.citation International Work-Conference on the Interplay Between Natural and Artificial Computation , Las Palmas de Gran Canaria, Canary Islands, Spain, June 15-18, 2005, en_US
dc.identifier.clearanceno 05-0473
dc.identifier.uri http://hdl.handle.net/2014/41194
dc.description.abstract The Jet Propulsion Laboratory (JPL) performs research in fault tolerant, long life, and space survivable electronics for the National Aeronautics and Space Administration (NASA). With that focus, JPL has been involved in Evolvable Hardware (EHW) technology research for the past several years. We have advanced the technology not only by simulation and evolution experiments, but also by designing, fabricating, and evolving a variety of transistor-based analog and digital circuits at the chip level. EHW refers to self-configuration of electronic hardware by evolutionary/genetic search mechanisms, thereby maintaining existing functionality in the presence of degradations due to aging, temperature, and radiation. In addition, EHW has the capability to reconfigure itself for new functionality when required for mission changes or encountered opportunities. Evolution experiments are performed using a genetic algorithm running on a DSP as the reconfiguration mechanism and controlling the evolvable hardware mounted on a self-contained circuit board. Rapid reconfiguration allows convergence to circuit solutions in the order of seconds. The paper illustrates hardware evolution results of electronic circuits and their ability to perform under 230°C temperature as well as radiations of up to 250 kRad. en_US
dc.description.sponsorship NASA/JPL en_US
dc.language.iso en_US en_US
dc.publisher Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2005. en_US
dc.subject Evolvable hardware en_US
dc.subject self configuration en_US
dc.title Transistor level circuit experiments using evolvable hardware. en_US
dc.type Preprint en_US


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