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On automating failure mode analysis and enforcing its integrity

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dc.contributor.author Tai, Ann T.
dc.contributor.author Tso, Kam S.
dc.contributor.author Chau, Savio N.
dc.date.accessioned 2007-11-30T20:02:09Z
dc.date.available 2007-11-30T20:02:09Z
dc.date.issued 2005-05-16
dc.identifier.citation 11th International Symposium of Pacific Rim Dependable Computing, Hunan, China, December 12 - 14, 2005. en
dc.identifier.clearanceno 05-1487
dc.identifier.uri http://hdl.handle.net/2014/40551
dc.description.abstract This paper reports our experience on the development of a design-for-safety (DFS) workbench called Risk Assessment and Management Environment (RAME) for microelectronic avionics systems. Our objective is to transform DFS practice from an ad-hoc, inefficient, error-prone approach to a stringent engineering process such that DFS can keep up with the rapidly growing complexity of avionics systems. In particular, RAME is built upon an information infrastructure that comprises a fault model, a knowledge base, and a failure reporting/tracking system. This infrastructure permits systematic learning from prior projects and enables the automation of failure modes, effects and criticality analysis (FMECA). Among other unique features, the most important advantage of RAME is its capability of directly accepting design source code in hardware description languages (HDLs) for automated failure mode analysis... en
dc.description.sponsorship NASA/JPL en
dc.format.extent 847345 bytes
dc.format.mimetype application/pdf
dc.language.iso en_US en
dc.publisher Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2005. en
dc.subject design for safety en
dc.subject failure mode analysis en
dc.subject information infrastructure en
dc.subject design source code en
dc.subject failure mode, cause, and effect analysis (FMECA) en
dc.subject FMECA automation en
dc.title On automating failure mode analysis and enforcing its integrity en
dc.type Preprint en


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