JPL Technical Report Server

A Review of Chip Scale Package Assembled Reliability

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dc.contributor.author Ghaffarian, Reza en_US
dc.date.accessioned 2004-09-25T23:39:13Z
dc.date.available 2004-09-25T23:39:13Z
dc.date.issued 1997-02-20 en_US
dc.identifier.citation Sunnyvale, California, USA en_US
dc.identifier.clearanceno 97-0010 en_US
dc.identifier.uri http://hdl.handle.net/2014/21642
dc.description.abstract NASA Headquarters, code Q, has established the Advanced Interconnect Program (AIP) to address the NASA's Common needs in electronic packaging for microspacecraft applications. The Jet Propulsion Laboratory was funded to address the quality and reliability of several high denstiy electronic packaging technologies. en_US
dc.format.extent 727786 bytes
dc.format.mimetype application/pdf
dc.language.iso en_US
dc.subject.other Chip Scale Packaging Microspacecraft en_US
dc.title A Review of Chip Scale Package Assembled Reliability en_US


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