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The Hardware Results of a 64 x 64 Analog Input Array for a 3-Dimensional Neural Network Processor

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dc.contributor.author Duong, T. en_US
dc.contributor.author Thomas, T. en_US
dc.contributor.author Daud, T. en_US
dc.contributor.author Thakoor, A. en_US
dc.contributor.author Suddarth, S. en_US
dc.date.accessioned 2004-09-24T20:12:52Z
dc.date.available 2004-09-24T20:12:52Z
dc.date.issued 1998-05-04 en_US
dc.identifier.citation World Conference on Computational Intelligence en_US
dc.identifier.citation Anchorage, Alaska, U.S.A. en_US
dc.identifier.clearanceno 98-0213 en_US
dc.identifier.uri http://hdl.handle.net/2014/19032
dc.description.abstract Algorithms for the solution of spatio-temporal recognition and classification problems are known to require intense image data computation. en_US
dc.format.extent 317623 bytes
dc.format.mimetype application/pdf
dc.language.iso en_US
dc.subject.other 3-dimensional artificial neural network (3DANN) Column Loading Input Chip (CLIC) image data parallel processing en_US
dc.title The Hardware Results of a 64 x 64 Analog Input Array for a 3-Dimensional Neural Network Processor en_US


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