Design of a Fault-tolerant COTS-based Bus Architecture

Alkalai, L.; Burt, J.; Chau, S.; Tai, A.

dc.contributor.author	Alkalai, L.	en_US
dc.contributor.author	Burt, J.	en_US
dc.contributor.author	Chau, S.	en_US
dc.contributor.author	Tai, A.	en_US
dc.date.accessioned	2004-09-23T23:43:01Z
dc.date.available	2004-09-23T23:43:01Z
dc.date.issued	1999-12-16	en_US
dc.identifier.citation	Pacific RIM International Symposium on Dependable Computing	en_US
dc.identifier.citation	Hong Kong, China	en_US
dc.identifier.clearanceno	99-0704	en_US
dc.identifier.uri	http://hdl.handle.net/2014/17263
dc.description.abstract	In this paper, we report our experiences and findings on the design of fault-tolerant bus architecture comprised of two COT buses, the IEEE 1394 and the I*Sup 2*C.	en_US
dc.format.extent	1046305 bytes
dc.format.mimetype	application/pdf
dc.language.iso	en_US
dc.subject.other	COTS IEEE 1394 I*Sup 2*C Fault-tolerant bus space applications commericial off-the-shelf	en_US
dc.title	Design of a Fault-tolerant COTS-based Bus Architecture	en_US