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An FPGA based test bench for non-volatile memory testing

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dc.contributor.author Patel, J. en_US
dc.contributor.author Rao, V. en_US
dc.contributor.author Patel, J. en_US
dc.contributor.author Namkung, J. en_US
dc.date.accessioned 2004-09-23
dc.date.available 2004-09-23
dc.date.issued 2001-11-07 en_US
dc.identifier.citation Non-volatile Memory Technology Symposium 2001 en_US
dc.identifier.citation San Diego, CA, USA en_US
dc.identifier.clearanceno 01-2072 en_US
dc.identifier.uri http://hdl.handle.net/2014/13304
dc.format.extent 66128 bytes
dc.format.mimetype application/pdf
dc.language.iso en_US
dc.subject.other non-volatile memory memory tester endurance testing en_US
dc.title An FPGA based test bench for non-volatile memory testing en_US


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