JPL Technical Report Server

Performance of low-density parity-check coded modulation

Show simple item record

dc.contributor.author Hamkins, Jon
dc.date.accessioned 2014-09-05T20:17:56Z
dc.date.available 2014-09-05T20:17:56Z
dc.date.issued 2010-03-06
dc.identifier.citation 2010 IEEE Aerospace Conference, Big Sky, Montana, March 6-13, 2010 en_US
dc.identifier.clearanceno 09-4496
dc.identifier.uri http://hdl.handle.net/2014/44689
dc.description.abstract This paper reports the simulated performance of each of the nine accumulate-repeat-4-jagged-accumulate (AR4JA) low-density parity-check (LDPC) codes [3] when used in conjunction with binary phase-shift-keying (BPSK), quadrature PSK (QPSK), 8-PSK, 16-ary amplitude PSK (16- APSK), and 32-APSK.We also report the performance under various mappings of bits to modulation symbols, 16-APSK and 32-APSK ring scalings, log-likelihood ratio (LLR) approximations, and decoder variations. One of the simple and well-performing LLR approximations can be expressed in a general equation that applies to all of the modulation types. en_US
dc.description.sponsorship NASA/JPL en_US
dc.language.iso en_US en_US
dc.publisher Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2010 en_US
dc.title Performance of low-density parity-check coded modulation en_US
dc.type Presentation en_US


Files in this item

This item appears in the following Collection(s)

Show simple item record

Search


Browse

My Account