JPL Technical Report Server

Hardware implementation of lossless adaptive and scalable hyperspectral data compression for space

Show simple item record

dc.contributor.author Aranki, Nazeeh
dc.contributor.author Keymeulen, Didier
dc.contributor.author Bakhshi, Alireza
dc.contributor.author Klimesh, Matthew
dc.date.accessioned 2014-08-28T20:27:40Z
dc.date.available 2014-08-28T20:27:40Z
dc.date.issued 2009-07-29
dc.identifier.citation NASA/ESA Conference on Adaptive Hardware and Systems, San Francisco, California, July 29-August 1, 2009 en_US
dc.identifier.clearanceno 09-1948
dc.identifier.uri http://hdl.handle.net/2014/44663
dc.description.abstract On-board lossless hyperspectral data compression reduces data volume in order to meet NASA and DoD limited downlink capabilities. The technique also improves signature extraction, object recognition and feature classification capabilities by providing exact reconstructed data on constrained downlink resources. At JPL a novel, adaptive and predictive technique for lossless compression of hyperspectral data was recently developed. This technique uses an adaptive filtering method and achieves a combination of low complexity and compression effectiveness that far exceeds state-of-the-art techniques currently in use. The JPL-developed ‘Fast Lossless’ algorithm requires no training data or other specific information about the nature of the spectral bands for a fixed instrument dynamic range. It is of low computational complexity and thus well-suited for implementation in hardware. A modified form of the algorithm that is better suited for data from pushbroom instruments is generally appropriate for flight implementation. A scalable field programmable gate array (FPGA) hardware implementation was developed. The FPGA implementation achieves a throughput performance of 58 Msamples/sec, which can be increased to over 100 Msamples/sec in a parallel implementation that uses twice the hardware resources This paper describes the hardware implementation of the ‘Modified Fast Lossless’ compression algorithm on an FPGA. The FPGA implementation targets the current state-of-the-art FPGAs (Xilinx Virtex IV and V families) and compresses one sample every clock cycle to provide a fast and practical real-time solution for space applications. en_US
dc.description.sponsorship NASA/JPL en_US
dc.language.iso en_US en_US
dc.publisher Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2009 en_US
dc.subject FPGA implementation en_US
dc.subject space borne instrument en_US
dc.title Hardware implementation of lossless adaptive and scalable hyperspectral data compression for space en_US
dc.type Presentation en_US


Files in this item

This item appears in the following Collection(s)

Show simple item record

Search


Browse

My Account