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The design of a fault-tolerant, real-time, multi-core computer system

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dc.contributor.author Gostelow, Kim P.
dc.date.accessioned 2012-03-23T19:59:01Z
dc.date.available 2012-03-23T19:59:01Z
dc.date.issued 2011-03-09
dc.identifier.citation IEEE Aerospace Conference, Big Sky, Montana, March 5-12, 2011 en_US
dc.identifier.clearanceno 11-0916
dc.identifier.uri http://hdl.handle.net/2014/42011
dc.description.sponsorship NASA/JPL en_US
dc.language.iso en_US en_US
dc.publisher Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2011. en_US
dc.subject machine architecture en_US
dc.title The design of a fault-tolerant, real-time, multi-core computer system en_US
dc.type Presentation en_US
dc.subject.NASATaxonomy Computer Operations and Hardware en_US


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