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FPGA implementation of stereo disparity with high throughput for mobility applications

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dc.contributor.author Villalpando, Carlos Y.
dc.contributor.author Morfopolous, Arin
dc.contributor.author Matthies, Larry
dc.date.accessioned 2011-08-19T16:29:19Z
dc.date.available 2011-08-19T16:29:19Z
dc.date.issued 2011-03-05
dc.identifier.citation 2011 IEEE Aerospace Conference, Big Sky, Montana, March 5, 2011 en_US
dc.identifier.clearanceno 11-0146
dc.identifier.uri http://hdl.handle.net/2014/41800
dc.description.abstract High speed stereo vision can allow unmanned robotic systems to navigate safely in unstructured terrain, but the computational cost can exceed the capacity of typical embedded CPUs. In this paper, we describe an end-to-end stereo computation co-processing system optimized for fast throughput that has been implemented on a single Virtex 4 LX160 FPGA. This system is capable of operating on images from a 1024 × 768 3CCD (true RGB) camera pair at 15 Hz. Data enters the FPGA directly from the cameras via Camera Link and is rectified, pre-filtered and converted into a disparity image all within the FPGA, incurring no CPU load. Once complete, a rectified image and the final disparity image are read out over the PCI bus, for a bandwidth cost of 68 MB/sec. Within the FPGA there are 4 distinct algorithms: Camera Link capture, Bilinear rectification, Bilateral subtraction pre-filtering and the Sum of Absolute Difference (SAD) disparity. Each module will be described in brief along with the data flow and control logic for the system. The system has been successfully fielded upon the Carnegie Mellon University's National Robotics Engineering Center (NREC) Crusher system during extensive field trials in 2007 and 2008 and is being implemented for other surface mobility systems at JPL. en_US
dc.description.sponsorship NASA/JPL en_US
dc.language.iso en_US en_US
dc.publisher Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2011. en_US
dc.subject Field-programmable Gate Array (FPGA) en_US
dc.subject machine vision en_US
dc.subject stereo en_US
dc.subject Program processors en_US
dc.subject Generators en_US
dc.subject Pixel en_US
dc.subject Random access memory en_US
dc.title FPGA implementation of stereo disparity with high throughput for mobility applications en_US
dc.type Presentation en_US
dc.subject.NASATaxonomy Electronics and Electrical Engineering en_US
dc.subject.NASATaxonomy Instrumentation and Photography en_US


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