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An FPGA-based doppler processor for a spaceborne precipitation radar

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dc.contributor.author Durden, S. L.
dc.contributor.author Fischman, M. A.
dc.contributor.author Johnson, R. A.
dc.contributor.author Chu, A. J.
dc.contributor.author Jourdan, M. N.
dc.contributor.author Tanelli, S.
dc.date.accessioned 2008-11-03T23:29:31Z
dc.date.available 2008-11-03T23:29:31Z
dc.date.issued 2007-10
dc.identifier.citation Journal of Atmosphere and Oceanic Technology, Vol. 24 Iss. 10, p. 1811-1815, October 2007 doi.org/10.1175/JTECH2086.1 en_US
dc.identifier.clearanceno 07-0644
dc.identifier.uri http://hdl.handle.net/2014/40996
dc.description.abstract Measurement of precipitation Doppler velocity by spaceborne radar is complicated by the large velocity of the satellite platform. Even if successive pulses are well correlated, the velocity measurement may be biased if the precipitation target does not uniformly fill the radar footprint. It has been previously shown that the bias in such situations can be reduced if full spectral processing is used. The authors present a processor based on field-programmable gate array (FPGA) technology that can be used for spectral processing of data acquired by future spaceborne precipitation radars. The requirements for and design of the Doppler processor are addressed. Simulation and laboratory test results show that the processor can meet real-time constraints while easily fitting in a single FPGA. en_US
dc.description.sponsorship NASA/JPL en_US
dc.language.iso en_US en_US
dc.publisher American Meteorological Society en_US
dc.subject field programmable gate arrays (FPGA) en_US
dc.subject Doppler radar en_US
dc.subject measurements en_US
dc.title An FPGA-based doppler processor for a spaceborne precipitation radar en_US
dc.type Article en_US


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