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A 540–640-GHz high-efficiency four-anode frequency tripler

Show simple item record Maestrini, Alain Ward, John S. Gill, John J. Javadi, Hamid S. Schlecht, Erich Tripon-Canseliet, Charlotte Chattopadhyay, Goutam Mehdi, Imran 2008-09-04T18:28:18Z 2008-09-04T18:28:18Z 2005-09-09
dc.identifier.citation IEEE Transactions on Microwave Theory and Techniques, Vol. 53, No. 9, p. 2835-2843, September 2005 en_US
dc.identifier.clearanceno 04-2991
dc.description.abstract We report on the design and performance of a broad-band, high-power 540–640-GHz fix-tuned balanced frequency tripler chip that utilizes four planar Schottky anodes. The suspended strip-line circuit is fabricated with a 12-micron-thick support frame and is mounted in a split waveguide block. The chip is supported by thick beam leads that are also used to provide precise RF grounding. At room temperature, the tripler delivers 0.9–1.8 mW across the band with an estimated efficiency of 4.5%–9%. When cooled to 120 K, the tripler provides 2.0–4.2 mW across the band with an estimated efficiency of 8%–12%. en_US
dc.description.sponsorship NASA/JPL en_US
dc.language.iso en_US en_US
dc.publisher IEEE en_US
dc.subject balanced triplers en_US
dc.subject frequency multipliers en_US
dc.subject local oscillators en_US
dc.subject planar diodes en_US
dc.title A 540–640-GHz high-efficiency four-anode frequency tripler en_US
dc.type Article en_US

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