Persistent Identifier
|
hdl:2014/37880 |
Publication Date
|
2004-04-01 |
Title
| Onboard FPGA-based SAR processing for future spaceborne systems |
Author
| Le, Charles (Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2004.)
Chan, Samuel (Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2004.)
Cheng, Frank (Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2004.)
Fang, Winston (Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2004.)
Fischman, Mark (Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2004.)
Hensley, Scott (Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2004.)
Johnson, Robert (Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2004.)
Jourdan, Michael (Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2004.)
Marina, Miguel (Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2004.)
Parham, Bruce (Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2004.)
Rogez, Francois (Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2004.)
Rosen, Paul (Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2004.)
Shah, Biren (Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2004.)
Taft, Stephanie (Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2004.) |
Point of Contact
|
Use email button above to contact.
Le, Charles |
Description
| We present a real-time high-performance and fault-tolerant FPGA-based hardware architecture for the processing of synthetic aperture radar (SAR) images in future spaceborne system. In particular, we will discuss the integrated design approach, from top-level algorithm specifications and system requirements, design methodology, functional verification and performance validation, down to hardware design and implementation. |
Subject
| Other |
Production Date
| 2004-04-01 |