Publisher:Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2005.
Citation:European Solid-State Circuits Conference (ESSCIRC), Grenoble, France, September 12-16, 2005
Abstract:
A novel analog muliplier using SOI four-gate transistors (G4-FETs) is presented. Thanks to the multiple inputs of the G4-FET that may be biased independently, the number of transistors in the proposed circuit is dramatically reduced, compared to conventional single-gate MOSFET based multipliers.