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Preliminary Design and Implementation of the Baseline Digital Baseband Architecture for Advanced Deep Space Transponders

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dc.contributor.author Nguyen, T. M. en_US
dc.contributor.author Yeh, H. G. en_US
dc.date.accessioned 2004-10-04T22:53:09Z
dc.date.available 2004-10-04T22:53:09Z
dc.date.issued 1994
dc.identifier.citation USA en_US
dc.identifier.clearanceno 94-0276
dc.identifier.uri http://hdl.handle.net/2014/32532
dc.description.abstract This article investigates and identifies the baseline design and implementation of the digital baseband architecture for advanced deep space transponders. Trade studies on the selection of the number of bits for the analog-to-digital converter (ADC) and optimum sampling schemes are presented. In addition, the proposed optimum sampling scheme is analyzed in detail. Descriptions of possible implementations for the digital baseband (or digital front end) and digital phase-locked loop (DPLL) for carrier tracking are also described. en_US
dc.format.extent 479514 bytes
dc.format.mimetype application/pdf
dc.language.iso en_US
dc.subject.other Deep Space Transponders en_US
dc.title Preliminary Design and Implementation of the Baseline Digital Baseband Architecture for Advanced Deep Space Transponders en_US


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