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Progress in Voltage and Current Mode On-Chip Analog-to-Digital converters for CMOS Image Sensors

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dc.contributor.author Panicacci, Roger en_US
dc.contributor.author Pain, Bedabrata en_US
dc.contributor.author Zhou, Zhimin en_US
dc.contributor.author Nakamura, Junichi en_US
dc.contributor.author Fossum, Eric R. en_US
dc.date.accessioned 2004-09-29T23:35:25Z
dc.date.available 2004-09-29T23:35:25Z
dc.date.issued 1996-01-31 en_US
dc.identifier.citation San Jose, California, USA en_US
dc.identifier.clearanceno 96-0191 en_US
dc.identifier.uri http://hdl.handle.net/2014/23867
dc.description.abstract Two 8 bit successive approximation analog-to-digital converter (ADC) designs and a 12 bit current mode incremental sigma delta ADC have been designed, fabricated, and tested. The successive approximation test chip designs are compatible with active pixel sensor (APS) column parallel architectures with a 20.4 ??itch in a 1.2 ??-well CMOS process and a 40 ??itch in a 2 ??-well CMOS process. The successive approximation designs consume as little as 49 ??t a 500 KHz conversion rate meeting the low power requirements inherent in column parallel architectures. The current mode incremental sigma-delta ADC test chips designed to be multiplied among 8 columns in a semi-column parallel current mode APS architecture. The higher accuracy ADC consumes 800 ??t a 5 KHz. en_US
dc.format.extent 754737 bytes
dc.format.mimetype application/pdf
dc.language.iso en_US
dc.subject.other analog-to-digital converter ADC active pixel sensor APS en_US
dc.title Progress in Voltage and Current Mode On-Chip Analog-to-Digital converters for CMOS Image Sensors en_US


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