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Novel Highly Parallel and Systolic Architectures Using Quantum Dot-Based Hardware

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dc.contributor.author Fijany, A. en_US
dc.contributor.author Toomarian, B. N. en_US
dc.contributor.author Spotniz, M. en_US
dc.date.accessioned 2004-09-23T23:26:42Z
dc.date.available 2004-09-23T23:26:42Z
dc.date.issued 1999-08-17 en_US
dc.identifier.citation Mtg: Parallel Computing 1999 en_US
dc.identifier.citation Delft, The Netherlands en_US
dc.identifier.clearanceno 99-0535 en_US
dc.identifier.uri http://hdl.handle.net/2014/17113
dc.format.extent 354294 bytes
dc.format.mimetype application/pdf
dc.language.iso en_US
dc.subject.other Quantum Dot systolic arrays FFT en_US
dc.title Novel Highly Parallel and Systolic Architectures Using Quantum Dot-Based Hardware en_US


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