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CMOS sum and difference imager with on-chip charge-leakage compensation

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dc.contributor.author Seshadri, S. en_US
dc.contributor.author Yang, G. en_US
dc.contributor.author Ortiz, M. en_US
dc.contributor.author Wrigley, C. en_US
dc.contributor.author Pain, B. en_US
dc.date.accessioned 2004-09-22T23:41:25Z
dc.date.available 2004-09-22T23:41:25Z
dc.date.issued 2001-05-21 en_US
dc.identifier.citation 2001 IEEE Workshop on CCDs and Advanced Image Sensors en_US
dc.identifier.citation Lake Tahoe, Nevada, USA en_US
dc.identifier.clearanceno 01-1148 en_US
dc.identifier.uri http://hdl.handle.net/2014/12827
dc.description.abstract This paper presents a new technique for implementing a low-power CMOS imager with simultaneous on-chip computation of the difference and summ of two successive frames. en_US
dc.format.extent 332074 bytes
dc.format.mimetype application/pdf
dc.language.iso en_US
dc.subject.other CMOS imager active pixel sensor motion estimation motion detection surveillance imager object segmentation en_US
dc.title CMOS sum and difference imager with on-chip charge-leakage compensation en_US


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