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CMOS imager with charge-leakage compensated frame difference and sum output

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dc.contributor.author Pain, B. en_US
dc.contributor.author Seshadri, S. en_US
dc.contributor.author Ortiz, M. en_US
dc.contributor.author Wrigley, C. en_US
dc.contributor.author Yang, G. en_US
dc.date.accessioned 2004-09-22T22:28:35Z
dc.date.available 2004-09-22T22:28:35Z
dc.date.issued 2001-05-06 en_US
dc.identifier.citation International Symposium on Circuits and Systems en_US
dc.identifier.citation Sydney, Australia en_US
dc.identifier.clearanceno 01-0389 en_US
dc.identifier.uri http://hdl.handle.net/2014/12333
dc.description.abstract This paper presents a new technique for implementing a low-power CMOS imager with simultaneous on-chip computation of the difference and sum of two successive frames. en_US
dc.format.extent 548822 bytes
dc.format.mimetype application/pdf
dc.language.iso en_US
dc.subject.other CMOS imager active pixel sensor APS photogate frame difference surveillance motion detection en_US
dc.title CMOS imager with charge-leakage compensated frame difference and sum output en_US


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