Design and demonstration of an advanced on-board processor for the second-generation precipitation radar

Fischman, M. A.; Berkun,  A. C.; Cheng,  F. T.; Chun,  W. W.; Im,  E.

dc.contributor.author	Fischman, M. A.	en_US
dc.contributor.author	Berkun, A. C.	en_US
dc.contributor.author	Cheng, F. T.	en_US
dc.contributor.author	Chun, W. W.	en_US
dc.contributor.author	Im, E.	en_US
dc.date.accessioned	2004-09-17T18:58:10Z
dc.date.available	2004-09-17T18:58:10Z
dc.date.issued	2003-03-08	en_US
dc.identifier.citation	2003 IEEE Aerospace Conference	en_US
dc.identifier.citation	Big Sky, MT, USA	en_US
dc.identifier.clearanceno	02-2608	en_US
dc.identifier.uri	http://hdl.handle.net/2014/10561
dc.description.abstract	The Next-Generation Precipitation Radar (PR-2) prototyped by NASA/JPL will depend heavily on high-performance digital processing to collect meaningful echo data.	en_US
dc.format.extent	2901622 bytes
dc.format.mimetype	application/pdf
dc.language.iso	en_US
dc.subject.other	field-programmable gate arrays pulse compression	en_US
dc.title	Design and demonstration of an advanced on-board processor for the second-generation precipitation radar	en_US