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The four-gate transistor

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dc.contributor.author Mojarradi, M. M. en_US
dc.contributor.author Cristoveanu, S. en_US
dc.contributor.author Allibert, F. en_US
dc.contributor.author France, G. en_US
dc.contributor.author Blalock, B. en_US
dc.contributor.author Durfrene, B. en_US
dc.date.accessioned 2004-09-17T18:12:56Z
dc.date.available 2004-09-17T18:12:56Z
dc.date.issued 2002-09-23 en_US
dc.identifier.citation ESSDERC: 32th European Solid-State Device Research Conference en_US
dc.identifier.citation Firenze, Italy en_US
dc.identifier.clearanceno 02-2177 en_US
dc.identifier.uri http://hdl.handle.net/2014/10067
dc.description.abstract The four-gate transistor or G4-FET combines MOSFET and JFET principles in a single SOI device. Experimental results reveal that each gate can modulate the drain current. Numerical simulations are presented to clarify the mechanisms of operation. The new device shows enhanced functionality, due to the combinatorial action of the four gates, and opens rather revolutionary applications. en_US
dc.format.extent 3048971 bytes
dc.format.mimetype application/pdf
dc.language.iso en_US
dc.subject.other neuro-prosthetic devices cortical signals en_US
dc.title The four-gate transistor en_US


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